There is a continued demand for thinner, lighter, and faster portable electronics devices. In striving to keep up with these demands, device makers are constantly looking for new materials that provide not only these qualities, but are also mechanically durable enough for the application and producible at a reasonable cost. Organic semiconductor and dielectric materials have attracted a great amount of attention in the research and commercial communities due to their advantages over inorganic materials, such as high mechanical flexibility, low manufacturing cost, and light weight.
One particular challenge for polymer transistors is to fabricate an ultrathin defect-free gate dielectric layer that also provides a high-quality interface with the adjacent semiconductive layer. This dielectric layer has to show high dielectric breakdown strength, very low electrical conductivity, very low interface and bulk trapping of carriers, and good stability. This challenge has been met for Si CMOS FET's through thermally-grown dielectrics. SiO2 is robust, has high film integrity and has sufficiently high dielectric breakdown strength for practical applications. However, in the case of organic devices, there continues to be a need to develop organic containing gate dielectric systems for commercial applications, such as electronic papers, printed logic circuits and RFID tags etc. Such gate dielectric layers must be easy to fabricate conformally on a variety of substrates in both top-gate and bottom-gate configurations. They also need to exhibit high flexural strength, significant thermal stability, and environmental resistance.
It has been found that the functionality of organic-material based devices is highly dependent on the synergy of the organic materials used, meaning that often the various organic components need to be developed and optimized in tandem. For example, although there are numerous insulating polymer systems known, the search for a gate dielectric that can fulfill all of the above requirements is still not trivial. Furthermore, the gate dielectric polymer must be compatible with the overall designated processing scheme of polymer FETs. For example, its formation must not destroy earlier formed layers, while it itself has to survive subsequent solvent and thermal processing. Applicants have found that the unmet needs described are met by the polymers and devices described herein.